/*!
    \file    readme.txt
    \brief   description of the TIMERs cascade synchro demo for GD32H7xx

    \version 2024-01-05, V1.2.0, firmware for GD32H7xx
*/

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*/

  This demo is based on the GD32H759I-EVAL-V1.1 board, it shows how to synchronize 
TIMER peripherals in cascade mode.

  In this example three timers are used:
  1/TIMER1 is configured as master timer:
  - PWM mode 0 is used
  - The TIMER1 update event is used as trigger output0

  2/TIMER7 is slave for TIMER1 and master for TIMER0:
  - PWM mode 0 is used
  - The ITI14(TIMER1) is used as input trigger
  - External clock mode is used, the counter counts on the rising edges of the selected
    trigger.
  - The TIMER7 update event is used as trigger output0.

  3/TIMER0 is slave for TIMER7:
  - PWM mode 0 is used
  - The ITI14(TIMER7) is used as input trigger
  - External clock mode is used, the counter counts on the rising edges of the selected
  trigger.

  The TIMERxCLK is fixed to 300MHz, the TIMER1 counter clock is: 300MHz/1500= 200 KHz.

  The master timer TIMER1 is running at TIMER1 frequency :
  TIMER1 frequency = (TIMER1 counter clock)/ (TIMER1 period + 1) = 50 Hz, and the duty
  cycle = TIMER1_CH0CV/(TIMER1_CAR + 1) = 50% (PA5: TIMER1 CH0).

  The TIMER7 is running:
  - At (TIMER1 frequency)/ (TIMER7 period + 1) = 25 Hz and a duty cycle equal to 
    TIMER7_CH0CV/(TIMER7_CAR + 1) = 50% (PC6: TIMER7 CH0).

  The TIMER0 is running:
  - At (TIMER7 frequency)/ (TIMER0 period + 1) = 12.5 Hz and a duty cycle equal to
    TIMER0_CH0CV/(TIMER0_CAR + 1) = 50% (PA8: TIMER0 CH0).
